Because large parts of the language make no sense in a hardware context, synthesizable VHDL is a relatively small subset of VHDL. You must stick to this subset, and understand exactly how the synthesis tool you use interprets that code. For FPGA in particular you must also develop a good understanding of the structure of your chip, and know how your code must reflect the most efficient use of that structure. Fundamentally, never forget that you are designing a circuit, not writing a program. Forgetting this simply but important fact will only lead to pain later.
Top 5 books to refer for a VHDL beginner
VHDL (VHSIC-HDL, Very High-Speed Integrated Circuit Hardware Description Language) is a hardware description language used in electronic des...
Friday, 25 November 2011
How must I write VHDL to make it synthesizable?
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