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Top 5 books to refer for a VHDL beginner

VHDL (VHSIC-HDL, Very High-Speed Integrated Circuit Hardware Description Language) is a hardware description language used in electronic des...

Sunday 26 January 2014

Intel Introduces 2 Ultra-Low-Power Mobile Chips

intel-core-haswell-cpu-processors-price-610x515 Intel has introduced nine Core i5 and Core i7 "Haswell" mobile processors, including two ultra-low-voltage processors for Ultrabooks, the 2-gigahertz i5-4310U and the 1.5GHz 4360U. The 4360U has the company's HD 5000 graphics capability, according to Intel.

The Haswell rollout has solidified the company's dominance in the computer chip business (including what it claims are record sales of desktop Core i7 CPUs), especially on the mobile side of things. Intel is looking to further its advantage with the release of a new batch of fourth-generation Core processors designed for notebooks.

The nine new mobile Haswell CPUs are a mix of Core i5 and i7 chips that will power performance portables, though a couple are ultra-low-voltage (ULV) processors that can be used in Ultrabooks.The cheapest new one is the i5-4310M at $225 (prices will factor into the cost of a new notebook, as the laptop upgrade market is neglible); its two cores run at 2.7GHz. For about $40 more, the i5-4340M goes to 2.9GHz, while for svelte systems, there's the 2GHz i5-4310U and the 1.5GHz 4360U. Despite the slower clock speed, the 4360U costs more than the other ULV chip because it makes use of Intel's more powerful HD 5000 graphics.

Even though these are new processors, they aren't a quantum leap beyond their predecessors. Because they are clocked about 100MHz higher than the initial Haswell CPUs, that's only about a few percentage points better in performance. But who's going to argue with faster, especially when it's going to be baked into new laptops over the next few months.

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Thursday 23 January 2014

3D graphene-like material promises super electronics

novel-3D-graphene-1Graphane, the thinnest and strongest known material in the universe and a formidable conductor of electricity and heat – gets many of its amazing properties from the fact that it occupies only two dimensions: It has length and width but no height, because it's made of a single layer of atoms. But this special characteristics sometimes makes it difficult to work with, and a challenge to manufacture.

Researchers around the world have looked for ways to take full advantage of its many desirable properties. Now scientists have discovered a material that has a similar electronic structure to graphene but can exist in three dimensions, instead of a flat sheet like graphene, could lead to faster transistors and more compact hard drives.

 Plot of energy levels of electrons in trisodium bismuthide showing that this bulk material has properties similar to graphene.

The material is called three-dimensional topological Dirac semi-metal (3DTDS) and is a form of the chemical compound sodium bismuthate, Na3Bi.

Researchers led by scientists from Oxford University, Diamond Light Source, Rutherford Appleton Laboratory, Stanford University, and Berkeley Lab's Advanced Light Source, has discovered 3DTDS.

'The 3DTDS we have found has a lot in common with graphene and is likely to be as good or even better in terms of electron mobility – a measure of both how fast and how efficiently an electron can move through a material,' said Dr Yulin Chen of Oxford University's Department of Physics.

'You can think of the electronic structure of the 3DTDS as being rather like that of the graphene – the so called ''Dirac cone'' where electrons collectively act as if they forget their mass – but instead of flowing masslessly within a single sheet of atoms, the electrons in a 3DTDS flow masslessly along all directions in the bulk.'

Moreover, unlike in graphene, electrons on the surface of the 3DTDS remember their 'spin' – a quantum property akin to the orientation of a tiny magnet that can be used to store and read data – so that the magnet information can be directly transferred by the electric current, which could enable faster and more efficient spintronic devices.

'An important property of this new type of material is its magnetoresistance – how its electrical resistance changes when a magnetic field is applied,' said Dr Chen. 'In typical Giant Magnetoresistance Materials (GMR) the resistance changes by a few tens of percent and then saturate but with 3DTDS it changes 100s or 1000s of percent without showing saturation with the external magnetic field. With this much larger effect we could make a hard drive that is higher intensity, higher speed, and lower energy consumption – for example turning a 1 terabyte hard drive into a drive that can store 10 terabytes within the same volume.'

While this particular compound is too unstable to use in devices, the team is testing more stable compounds and looking for ways to tailor them for applications.

Dr Chen said: 'Now that we have proved that this kind of material exists, and that such compounds can have one of the highest electron mobilities of any material so far discovered, the race is on to find more such materials and their applications, as well as other materials with unusual topology in their electronic structure.'

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Sunday 12 January 2014

Modelsim Student Edition

modelsim-fpga-simulationMentor Graphics was the first to combine single kernel simulator (SKS) technology with a unified debug environment for Verilog, VHDL, and SystemC. The combination of industry-leading, native SKS performance with the best integrated debug and analysis environment make ModelSim the simulator of choice for both ASIC and FPGA design. The best standards and platform support in the industry make it easy to adopt in the majority of process and tool flows.

About ModelSim PE Student Edition


  • Support for both VHDL and Verilog designs (non-mixed).
  • Intelligent, easy-to-use graphical user interface with TCL interface.
  • Project manager and source code templates and wizards.

Now please be advised that the download url for ModelSim PE Student Edition (10.2c) has been permanently moved to the Mentor Graphics Higher Education website:


The current ModelSim PE Student Edition release is 10.2c. New releases will be posted to this web page.

Please note that the license request process remains the same.

1. With admin user rights to the Windows based PC, download and execute the installer.

2. Follow the dialog prompts and agree to the End User License Agreement

3. The last step of the installation will open a web browser window to the Student Edition license request page.

4. Information from YOUR computer will assist in creating the license file.

5. Fill out the license request form and be sure that you enter a valid email address.

6. You will immediately be sent an email with the license file and instructions.

7. Check your spam folder if you do not receive the license file within a few minutes.

8. If you never receive the email containing the license file, you MUST rerun the installer to reach the license request page again.


Please remember that the license file is tied to the computer that you installed ModelSim PE Student Edition upon. You may request the license be delivered to a different email address if you did not receive the license file the first time around.

In addition, if your University uses ModelSim PE Student Edition in your Classroom - please have your course administrator contact the Higher Education Department for FULL ModelSim LICENSES through the Higher Education Program for a modest support fee.

Lastly - there is NO End-User Product Support for ModelSim PE Student Edition.

Saturday 11 January 2014

Modelsim Tips and Tricks

1. How to get rid of Std Arithmetic warnings around 0 ns?

    # ** Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).
    #    Time: 0 ns  Iteration: 1  Instance: /cordic_tb/uut/add3

    Simply turn the Std checking off in your  .do or .tcl script file, example:

    set StdArithNoWarnings 1
    run 0 ns;
    set StdArithNoWarnings 0
    # Continue script

2. How to get rid of Std Arithmetic warnings until my reset is asserted?

    If the warnings continue until a certain time or when a signal is asserted then the when statement can help out.

    Example: the Std warnings can be ignored until the signal reset_s is asserted

    when -label enable_StdWarn {reset_s == '1'} {echo "Enable StdArithWarnings" ; set StdArithNoWarnings 0 ;}

    Example: the Std warnings can be ignored until 3800 ns

    when -label enable_StdWarn {$now == @3800 ns} {echo "Enable StdArithWarnings" ; set StdArithNoWarnings 0 ;}

3. How to stop the simulator without using asserts?

    The usual way to stop the simulator is to use the assert statement in VHDL. However, not everybody likes the Failure/Error message in the transcript window.

    # ** Failure: End of Simulation
    #    Time: 360 ns  Iteration: 0  Process: /test_tb/line__35 File: test_tb.vhd

    An easy solution is the same construct as shown above. Simple add a signal to your testbench and assert this signal at the end of the simulation. Then use the when statement in your script to stop the simulator.

    Example: stop the simulator when the signal end_of_simulation='1'

    when -label end_of_simulation {end_of_sim == '1'} {echo "End of simulation" ; stop ;}

    # End of simulation
    # Simulation stop requested

    Note: for maximum portability to other simulators the assert statement is recommended method!

4. How to speed up simulation/reduce wlf file size?

    There are many ways to speed up simulation. If you are performing long simulation you can speed up the simulation by turning off the signal logging to the wlf file until you reach the time of interest.

    Example: Disable signal logging until time 4420 us

    nolog -all
    when -label start_logging {$now == @4420 us} {echo "Start logging " ; log -r *;}

Tip: how to find out what a ModelSim error message means

    Error messages and exit codes are described in the User's Manual, however a quick way to get this information is to use the verror command. Simply type verror #error_number to get a detailed description on the error number.

Related Posts:

1. Customize the ModelSim Wave View in the Xilinx ISE Simulation
2. Compiling Xilinx library for ModelSim simulator

Friday 3 January 2014

India's fab project fails to attract big chip players

FAB-INDIA-IBM-ST Two consortia, led by Hindustan Semiconductor Manufacturing Corp. and Jaypee Associates, remain the top contenders to construct and equip proposed wafer fabrication facilities in India. No large semiconductors manufacturers have emerged as leaders for the project. HSMC is working with STMicroelectronics and Silterra, while Jaypee is collaborating with IBM Microelectronics and Tower Semiconductor.

Under the current proposals, Jaypee has tied up with IBM and Tower Jazz and has proposed a facility in Greater Noida with an investment of Rs 26,300 crore, while HSMC has partnered with ST Microelectronics and Silterra and has planned its unit at Prantij near Gandhinagar in Gujarat with an investment of Rs 25,250 crore.

India is trying to create an electronics manufacturing ecosystem to prevent the loss of billions of dollars of foreign exchange in such imports every year. This bill, expected to reach $55 billion (aboutRs 3.4 lakh crore) by 2020 from about $7 billion (Rs 43,600 crore) now, is projected to outstrip oil imports, according to a report commissioned by the industry lobby India Electronics and Semiconductor Association last year.

According to two government officials, the Department of Electronics and Information Technology (DeitY) has received only two new proposals - one by Interactivity Group (supported by a group of IIT alumni) and another by APSTL, an Arizona-headquartered technology firm. Even though an empowered committee set up to evaluate all the proposals is still studying them, an official said it is unlikely something concrete will come out of the two new applications.

With the government's support for setting up the fab firming up at about 40 per cent of the total cost, officials were keen on figuring out if other chipmakers could also be enticed to show interest.

Typically, setting up a chip foundry costs around $4-5 billion (Rs 24,800-31,000 crore). "The idea was, with the incentives firmed up, could we push the fence-sitters off the fence, but that didn't happen," the industry executive said. The deadline to submit initial plans in the fab under a separate call for expressions of interest ran out in November, and there have been no new viable plans submitted other than the two the government had already approved in-principle.

However, a lack of interest the second time around as well underlines the concerns about the feasibility of setting up fab units in the country. Experts argue the long-gestation period and the technology mandates of the government may diminish the usefulness of the projects when they finally come up. The facilities are expected to start production only sometime in 2017.