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VHDL (VHSIC-HDL, Very High-Speed Integrated Circuit Hardware Description Language) is a hardware description language used in electronic des...

Sunday 23 December 2012

Name

Formal Definition

A property of an identifier with respect to some named entity. Each form of declaration associates an identifier with a named entity. In certain places within the scope of a declaration, it is valid to use the identifier to refer to the associated named entity; these places are defined by the visibility rules. At such places, the identifier is said to be the name of the named entity.

Simplified Syntax

simple_name ::= identifier

selected_name ::= prefix . suffix

prefix ::= name | function_call

suffix ::= simple_name

        | character_literal

        | operator_symbol

        | all

indexed_name ::= prefix ( expression { , expression } )

slice_name ::= prefix ( discrete_range )

attribute_name ::= prefix [ signature ] ' attribute_designator [ ( expression ) ]

Description

Any declaration that introduces a named entity defines an identifier which enables reference to such an entity by using this identifier. However, it is not always possible to refer to an entity or part of it by using just its identifier. More general form of reference to entities is by a name. Names can also indicate objects of the access type, elements of the composite type, parts of the composite object or unit attributes which have an identifier in their declaration. The name can have any of the following forms:

· simple name

· operator symbol

· selected name

· indexed name

· slice name

· attribute name

The selected name, indexed name, slice name and attribute name contain prefix, which can be also a name or a function call. Prefix of selected name, indexed name or slice name must indicate a composite unit, which is composed of other units (Example 1).

The prefix of an attribute name can indicate any unit for which such an attribute exists (Example 2).

SIMPLE NAME AND OPERATOR SYMBOL

The simple name consists only of the identifier, which is assigned to a given unit in its declaration. The simple name can also indicate an alias of a given unit (Example 3).

The operator symbol is a string literal, which indicates the function declared for such an operator symbol (Example 4).

THE SELECTED NAME

The selected name serves for indicating a unit declared inside another unit or in a design library. A selected name consists of the prefix, which is the name of a composite unit, followed by a dot (.) and then by a suffix which is either the name of the element (if referenced individually) or the reserved word all (if all elements in the composite unit are referenced to).

The selected name can indicate all the units declared in a library and in a package. It can also define elements of a record, as well as objects indicated by pointers. The prefix is the composite unit in which the units are declared. The suffix can be a simple name, character literal, the operator symbol or the reserved word all. In the latter case, the name refers to all elements declared in a unit. Several selected names are presented in Example 5.

The prefix may also have a form of a selected name (with two dots in total), making the reference more complex. This form is used for example in the use clause. See Example 6.

The prefix in the selected name can indicate design entity, architecture body, subprogram, block, process, generate statement or loop statement. The entity indicated by the suffix of this name must be declared inside a given construct (Example 7).

THE INDEXED NAME

The indexed name indicates an element of an array, which is indicated by an expression list forming the array index. The number of expressions in the list must match the array dimension and the expressions values must fit within the respective index ranges (Example 8).

The index name can have the same form as the function call. In such a case, the name's interpretation depends on the context. If the interpretation of such a name is impossible, then the name is ambiguous.

THE SLICE NAME

The slice name allows indicating a part of a one-dimensional array. The part of the object indicated by the slice name is an object of the same class, e.g. slice name of variable is also a variable. The slice name consists of two elements: a prefix and a discrete range. The prefix is the name of the array, while discrete range defines which elements of the object are accessed through the slice name (Example 9).

The discrete range must be compatible with the array range, i.e. the range bounds must not be outside the range declared for the object and the direction must be the same as in the object's declaration.

The slice name is called a null slice if its discrete range is a null range. Null slices are illegal.

THE ATTRIBUTE NAME

The attribute name consists of two elements: a prefix and an attribute designator (name). The prefix indicates a unit, for which the attribute is specified and the attribute designator specifies the name of the attribute (Example 10).

The specification of an attribute name may contain an expression, but this is restricted only to those predefined attributes which require such expression (see attributes (predefined)for details). User-defined attributes may not be used with expressions.

The prefix can also indicate the unit alias. In such a case, attribute name defines the attribute of the unit and not the unit's alias. There are only three exceptions from this rule: attributes SIMPLE_NAME, PATH_NAME and INSTANCE_NAME (Example 11).

If the prefix indicates a subprogram, enumeration literal or an alias of any of the two, then the attribute name can also contain the signature, which helps to resolve any possible ambiguities arising from multiple objects with the same name (Example 12).

Examples

Example 1

C.X
A(1,10)
B(1 to 2)

C is an object of a record type, A is an object of an array type or a function call (the two numbers can be either indices of a two-dimensional array or two parameters of a function call) and B is an object of an array type.

Example 2

D'STABLE (5 ns)

Prefix D indicates a signal of any type.

Example 3

variable E: BIT_VECTOR (0 to 3);
alias F : BIT_VECTOR (0 to 3) is E;
E := "0000";
F := "1111";

E is a simple name which indicates the E variable, and F is a simple name which indicates alias of the E variable.

Example 4

function "+"(a,b: Integer) return REAL;
G := "+"(7,77);

In this example, "+" is an overloaded operator defined by the associated function (declaration of which is given above the call to the operator).

Example 5

WORK.N_GATES
DATA_RECORD.DAY
PAC_OPER."*"
STD_ULOGIC.'X'
NMOS_GATES.all
REC_PTR.all

The first name gives an access to the package N_Gates in the Work library. The second refers to the element Day of the record Data_Record. Note that both names are constructed in the same way and their correct interpretation is possible only from the context (not presented here). The third name relates to operation of a package. Fourth is a value of a type. Finally, the last two names relate to all declarations in a package and all objects addressed by the value of an access type, respectively.

Example 6

A_LIB.PAC_OPER."+"
STD_LOGIC.STD_ULOGIC.'U'

The first complex name gives an access to the "+" operator defined in the PAC_OPER package stored in the A_LIB library. The second example refers to the value "U" declared by the STD_ULOGIC type within STD_LOGIC package.

Example 7

B_1: block
signal Sig_X: BIT := '0';
begin
  ..................
  Gen_1: for i in 1 to 10 generate
          signal Sig_X : Bit;
          begin
            .................
            Sig_X <= B_1.Sig_X;
          end generate;
end block;

The access to the Sig_X signal declared in the B_1 block statement is possible only by using the specification of the selected name in which the prefix is the label of the block statement (i.e. B_1.Sig_X).

Example 8

type MEM_ARRAY is array (1 to 8) of BIT;
variable Mem_Var : MEM_ARRAY := "01000000";
Mem_Var(7)

The Mem_Var variable is the object of the MEM_ARRAY which is a one-dimensional array. That is why the expression list consists of only one value. The index indicates the array's element equal to '1'.

Example 9

variable MEM : BIT_VECTOR (15 downto 0);
MEM (15 downto 8)

The slice name presented in this example refers to the leftmost eight elements of the variable MEM.

Example 10

signal CLK : BIT;
CLK'EVENT -- An attribute EVENT of the signal CLK

The EVENT attribute allows to check for an event that just occurred on the signal indicated by the prefix (in this example CLK).

Example 11

alias MVL_ALIAS: MVL_ARRAY is MVL_VECTOR;
MVL_ALIAS'RIGHT(1)
MVL_ALIAS'SIMPLE_NAME

Attribute 'RIGHT indicates the right bound of the first range of MVL_VECTOR variable. However, 'SIMPLE_NAME relates to the MVL_ALIAS alias.

Example 12

function "xor" (L,R : STD_ULOGIC) return STD_ULOGIC;
attribute Built_In of "xor": function is TRUE;
"xor"[ STD_ULOGIC, STD_ULOGIC return STD_ULOGIC]'Built_In

The signature appearing in the attribute name specification allows describing the right function which has the Built_In attribute and not the standard one.

Important Notes

· Names must follow the rules of writing identifiers. In particular they must start with a letter and be composed of numbers and underscores. See identifier for details.

· None of the VHDL reserved words may be used as a name for other items.

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