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VHDL (VHSIC-HDL, Very High-Speed Integrated Circuit Hardware Description Language) is a hardware description language used in electronic des...

Saturday 2 April 2011

Timing Analysis

Depending on the design methodologies used, three types of timing analysis methods are commonly used:

1. Manual analysis
2. Static timing analysis
3. Dynamic timing analysis

Latch based designs are not common in large-scale integration; a separate section latch based static timing analysis which will be covered in later posts.

Manual Analysis: Manual analysis consists of taking a schematic or a netlist to determine the times signals arrive or leave at the input and output ports of the design, and calculating the delay time for the path by adding up the delay times for each component in the path. The objective of the process is to ensure that all signals meet the circuit constraints. This method works well for simple circuits and it is undesirable for large or iterative design process.

Static Timing Analysis: Static timing analysis verifies circuit timing by adding up propagation delays along paths between clocked elements in a circuit. It checks the delays along each path against the specified timing constraints for each circuit path and reports any existing timing violations. Static timing analysis tools can determine and report timing statistics such as the total number of paths, delays for each path and the circuit’s most critical paths...... Read more

Dynamic Timing Analysis: Dynamic timing analysis verifies circuit timing by applying test vectors to the circuit. This approach is an extension of simulation and ensures that circuit timing is tested in its functional context. This method reports timing errors that functionally exist in the circuit and avoids reporting errors that occur in unused circuit paths...... Read more

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