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VHDL (VHSIC-HDL, Very High-Speed Integrated Circuit Hardware Description Language) is a hardware description language used in electronic des...

Monday 30 April 2012

Draw OR gate using 2:1 MULTIPLEXER



Applying similar concept of AND gate using 2:1 MULTIPLEXER, make either of input A or B as select line of MUX, connect other input to 0th input line. 1st input of the MUX is always tied to logic 1.

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